View MT5C1001C-40LIT_6628643.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 1 features ? high speed: 20, 25, 35, and 45 ? battery backup: 2v data retention ? low power standby ? single +5v (+10%) power supply ? easy memory expansion with ce\ and oe\ options. ? all inputs and outputs are ttl compatible ? three-state output options marking ? timing 20ns access -20 25ns access -25 35ns access -35 45ns access -45 55ns access -55* 70ns access -70* ? package(s) ceramic dip (400 mil) c no. 109 ceramic lcc ec no. 207 ceramic flatpack f no. 303 ceramic soj dcj no. 501 ? operating temperature ranges industrial (-40 o c to +85 o c) it military (-55 o c to +125 o c) xt ? 2v data retention/low power l *electrical characteristics identical to those provided for the 45ns ac- cess devices. pin assignment (top view) available as military specifications ? smd 5962-92316 ? mil-std-883 28-pin dip (c) (400 mil) 32-pin lcc (ec) 32-pin soj (dcj) 32-pin flat pack (f) general description the mt5c1001 employs low power, high-perfor- mance silicon-gate cmos technology. static design eliminates the need for external clocks or timing strobes while cmos circuitry reduces power consumption and provides for greater reliability. for exibility in high-speed memory applications, micross offers chip enable (ce\) and output enable (oe\) capa- bility. these enhancements can place the outputs in high-z for additional exibility in system design. writing to these devices is accomplished when write enable (we|) and ce\ inputs are both low. reading is accomplished when we\ remains high while ce\ and oe\ go low. the devices offer a reduced power standby mode when disabled. this allows system designs to achieve low standby power requirements. the ?l? version provides an approximate 50 percent reduction in cmos standby current (i sbc2 ) over the standard version. all devices operation from a single +5v power supply and all inputs and outputs are fully ttl compatible. 1m x 1 sram sram memory array for more products and information please visit our web site at www.micross.com 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 a10 a11 a12 a13 a14 a15 nc a16 a17 a18 a19 q we\ vss vcc a9 a8 a7 a6 a5 a4 nc a3 a2 a1 a0 d ce\ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 a10 a11 a12 nc a13 a14 a15 nc a16 a17 a18 a19 nc q we\ vss vcc nc a9 a8 a7 a6 a5 a4 a3 nc a2 nc a1 a0 d ce\ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 a10 a11 a12 nc a13 a14 a15 nc a16 a17 a18 a19 nc q we\ vss vcc nc a9 a8 a7 a6 a5 a4 a3 nc a2 nc a1 a0 d ce\
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 2 functional block diagram truth table row decoder 1,048,576-bit memory array 512 rows x 2048 columns i/o control v cc vss d q ce\ we\ a 6 a 5 a 4 a 3 a 15 a 14 a 13 a 8 a 7 column decoder a 2 a 1 a 16 a 0 a 17 a 18 a 19 a 10 a 9 a 12 a 11 power down mode ce\ we\ output power standby h x high-z standby read l h q active write l l high-z active pin assignments pin assignment a 0 -a 19 address inputs we\ write enable ce\ chip enable d data input q data output nc no connection v cc +5v power supply v ss ground
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 3 absolute maximum ratings * *stresses greater than those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this speci cation is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. electrical characteristics and recommended dc operating conditions (-55 o c < t c < 125 o c; v cc = 5v +10%) capacitance voltage on any input relative to vss................................-.5v to +7v voltage on vcc supply relative to vss...............................-.5v to +7v voltage applied to q............................................................-.5v to +6v storage temperature......................................................-65 o c to +150 o c sym -20 -25 -35 -45 units notes i cc 125 120 115 110 ma 3 power supply current: standby i sbt1 50 45 40 35 ma i sbt2 25 25 25 25 ma i sbc2 10 10 10 10 ma "l" version only i sbc2 5555ma ce\ > v cc -0.2v; v cc = max v il < v ss +0.2v v ih > v cc -0.2v; f = 0 hz ce\ > v ih ; v cc = max f = max = 1/t rc (min) output open ce\ > v ih ; all other inputs < v ih or > v ih , v cc = max f = 0 hz max conditions ce\ < v il ; v cc = max f = max = 1/t rc (min) output open power supply current: operating parameter parameter conditions symbol maximum units notes input capacitance (a3-a5, a15 -a17) c i 10 pf 4 output capactiance (q) co 8 pf 4 input capacitance: (all other input s) c i 8pf 4 t a = 25 o c, f = 1mhz v cc = 5v description conditions symbol min max units notes input high (logic 1) voltage v ih 2.2 vcc+0.5 v 1 input low (logic 0) voltage v il -0.5 0.8 v 1, 2 input leakage current 0v v in vcc il i -5 5 a output leakage current output(s) disabled 0v < v out < vcc il o -5 5 a output high voltage i oh = -4.0ma v oh 2.4 v 1 output low voltage i ol = 8.0ma v ol 0.4 v 1
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 4 electrical characteristics and recommended ac operating conditions (note 5) (-55 o c < t c < 125 o c; v cc = 5v +10%) min max min max min max min max units notes read cycle read cycle time t rc 20 25 35 45 ns address access time t aa 20 25 35 45 ns chip enable access time t ace 20 25 35 45 ns output hold from address change t oh 3333 ns chip enable to output in low-z t lzce 3333 ns4, 6, 7 chip disable to output in high-z t hzce 8 101515ns4, 6, 7 chip enable to power-up time t pu 0000 ns4 chip disable to power-down time t pd 20 25 35 45 ns 4 write cycle write cycle time t wc 20 25 35 45 ns chip enable to end of write t cw 15 16 20 25 ns address valid to end of write t aw 15 16 20 25 ns address setup time t as 0000 ns address hold from end of write t ah 1111 ns write pulse width t wp 15 16 20 25 ns data setup time t ds 8 101315 ns data hold time t dh 0000 ns write disable to output in low-z t lzwe 3333 ns7 write enable to output in high-z t hzwe 0 9 010013013 ns4, 6, 7 -35 -45 description -20 symbol -25
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 5 ac test conditions input pulse levels ................................... vss to 3.0v input rise and fall times ....................................... 5ns input timing reference levels ............................. 1.5v output reference levels ..................................... 1.5v output load .............................. see figures 1 and 2 notes 1. all voltages referenced to v ss (gnd). 2. -3v for pulse width < 20ns 3. i cc is dependent on output loading and cycle rates. the speci ed value applies with the outputs unloaded, and f = 1 hz. t rc (min) 4. this parameter is guaranteed but not tested. 5. test conditions as speci ed with the output loading as shown in fig. 1 unless otherwise noted. 6. t lzce , t lzwe , t lzoe , t hzce , t hzoe and t hzwe are speci ed with cl = 5pf as in fig. 2. transition is measured 200mv typical from steady state voltage, allowing for actual tester rc time constant. 7. at any given temperature and voltage condition, t hzce is less than t lzce , and t hzwe is less than t lzwe and t hzoe is less than t lzoe . 8. we\ is high for read cycle. 9. device is continuously selected. chip enables and output enables are held in their active state. 10. address valid prior to, or coincident with, latest occurring chip enable. 11. t rc = read cycle time. 12. chip enable (ce\) and write enable (we\) can initiate and terminate a write cycle. fig. 1 output load equivalent fig. 2 output load equivalent data retention electrical characteristics (l version only) don?t care undefined low vcc data retention waveform v th = q v th = q 5pf data retention mode v dr > 2v 4.5v 4.5v v dr t cdr t r v ih v il v cc ce\ description symbol min max units notes v cc for retention data v dr 2--v v cc = 2v i ccdr 1.0 ma v cc = 3v 1.5 ma chip deselect to data retention time t cdr 0 -- ns 4 operation recovery time t r t rc ns 4, 11 data retention current ce\ > (v cc - 0.2v) and v in > (v cc - 0.2v) or < 0.2v conditions
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 6 taa toh trc trc previous data valid valid data valid address dq read cycle no. 1 8, 9 t rc t aa t oh trc trc ce\ read cycle no. 2 7, 8, 10 t rc tpd tpu thzce tace tlzce data valid dq icc t hzce t lzce t ace t pu t pd
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 7 note: output enable (oe\) is inactive (high). write cycle no. 2 7, 12 (write enabled controlled) write cycle no. 1 12 (chip enabled controlled) tdh tds twp1 twp1 tah tcw taw tcw tas twc twc high z data vaild address ce\ we\ d q t wc t aw t as t cw t ah t wp t ds t dh tdh twp1 twp1 tas taw tcw tah tcw twc twc data valid address ce\ we\ d q high-z t dh t ds t wc t aw t ah t cw t as t wp t hzwe t lzwe don?t care undefined
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 8 mechanical definitions* microsscase #109 (package designator c) smd #5962-92316, case outline t *all measurements are in inches. c note e 0 o to 15 o e1 d pin 1 e b b1 a q l note: these dimensions are per the smd. micross? package dimensional limits may differ, but they will be within the smd limits. min max a 0.075 0.095 b 0.016 0.020 b1 0.040 0.060 c 0.008 0.012 d 1.386 1.414 e 0.385 0.405 e1 0.390 0.410 e l 0.125 0.175 q 0.040 0.060 symbol smd specifications 0.100 bsc
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 9 mechanical definitions* micross case #207 (package designator ec) smd# 5962-92316, case outline y *all measurements are in inches. a b2 l1 l e b b1 d1 d e note: these dimensions are per the smd. micross? package dimensional limits may differ, but they will be within the smd limits. min max a 0.080 0.100 b 0.022 0.028 b1 0.004 0.014 b2 0.054 0.066 d 0.815 0.835 d1 0.740 0.760 e 0.392 0.408 e l 0.070 0.080 l1 0.090 0.110 symbol smd specifications 0.050 bsc
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 10 mechanical definitions* micross case #303 (package designator f) smd #5962-92316, case outline z *all measurements are in inches. pin 1 index 32 17 16 1 bottom view top view d e1 l e b d1 c e a q note: these dimensions are per the smd. micross? package dimensional limits may differ, but they will be within the smd limits. min max a 0.097 0.117 b 0.015 0.019 c 0.004 0.006 d 0.812 0.828 d1 0.745 0.755 e 0.324 0.336 e1 0.405 0.415 e l 0.290 0.310 q 0.032 0.038 symbol smd specifications 0.050 bsc
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 11 *all measurements are in inches. micross case #501 (package designator dcj) smd #5962-92316, case outline u mechanical definitions* a a2 e b d e d1 e1 e2 b1 note: these dimensions are per the smd. micross? package dimensional limits may differ, but they will be within the smd limits. min max a 0.135 0.153 a2 0.026 0.036 b1 0.030 0.040 b 0.015 0.019 d 0.812 0.828 d1 0.745 0.760 e 0.405 0.415 e1 0.435 0.445 e2 0.360 0.380 e symbol smd specifications 0.050 bsc
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 12 *available processes it = industrial temperature range -40 o c to +85 o c xt = extended temperature range -55 o c to +125 o c 883c = full military processing -55 o c to +125 o c ** options l = 2v data retention/low power ordering information example: mt5c1001ec-45/xt device number package type speed ns options** process device number package type speed ns options** process mt5c1001 c -20 l /* mt5c1001 ec -20 l /* mt5c1001 c -25 l /* mt5c1001 ec -25 l /* mt5c1001 c -35 l /* mt5c1001 ec -35 l /* mt5c1001 c -40 l /* mt5c1001 ec -40 l /* mt5c1001 c -55 l /* mt5c1001 ec -55 l /* mt5c1001 c -70 l /* mt5c1001 ec -70 l /* example: mt5c1001dcj-70/xt device number package t yp e speed ns options** process device number package t yp e speed ns options** process mt5c1001 f -20 l /* mt5c1001 dcj -20 l /* mt5c1001 f -25 l /* mt5c1001 dcj -25 l /* mt5c1001 f -35 l /* mt5c1001 dcj -35 l /* mt5c1001 f -40 l /* mt5c1001 dcj -40 l /* mt5c1001 f -55 l /* mt5c1001 dcj -55 l /* mt5c1001 f -70 l /* mt5c1001 dcj -70 l /* example: mt5c1001c-20l/it example: mt5c1001f-25l/883c
sram mt5c1001 limited availability mt5c1001 rev. 2.2 01/10 micross components reserves the right to change products or speci cations without notice. 13 micross to dscc part number cross reference* micross package designator ec asi part # smd part # mt5c1001ec-20l/883c 5962-9231608mya mt5c1001ec-20/883c 5962-9231604mya mt5c1001ec-25l/883c 5962-9231607mya mt5c1001ec-25/883c 5962-9231603mya mt5c1001ec-35l/883c 5962-9231606mya mt5c1001ec-35/883c 5962-9231602mya mt5c1001ec-45l/883c 5962-9231605mya mt5c1001ec-45/883c 5962-9231601mya micross package designator c micross part # smd part # mt5c1001c-20l/883c 5962-9231608mta mt5c1001c-20/883c 5962-9231604mta mt5c1001c-25l/883c 5962-9231607mta mt5c1001c-25/883c 5962-9231603mta mt5c1001c-35l/883c 5962-9231606mta mt5c1001c-35/883c 5962-9231602mta mt5c1001c-45l/883c 5962-9231605mta mt5c1001c-45/883c 5962-9231601mta micross package designator dcj micross part # smd part # mt5c1001dcj-20l/883c 5962-9231608mua mt5c1001dcj-20/883c 5962-9231604mua mt5c1001dcj-25l/883c 5962-9231607mua mt5c1001dcj-25/883c 5962-9231603mua mt5c1001dcj-35l/883c 5962-9231606mua mt5c1001dcj-35/883c 5962-9231602mua mt5c1001dcj-45l/883c 5962-9231605mua mt5c1001dcj-45/883c 5962-9231601mua micross package designator f micross part # smd part # mt5c1001f-20l/883c 5962-9231608mza mt5c1001f-20/883c 5962-9231604mza mt5c1001f-25l/883c 5962-9231607mza mt5c1001f-25/883c 5962-9231603mza mt5c1001f-35l/883c 5962-9231606mza mt5c1001f-35/883c 5962-9231602mza mt5c1001f-45l/883c 5962-9231605mza mt5c1001f-45/883c 5962-9231601mza * micross part number is for reference only. orders received referencing the smd part number will be processed per the smd.

▲Up To Search▲

Price & Availability of MT5C1001C-40LIT

	To Download MT5C1001C-40LIT Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .